This year ISCUG (India SystemC User Group) is being held in Bangalore on April. As the tentative agenda says, this is for all. First half for learners (3-5 training sessions) and after lunch success stories and more discussions how SystemC can be adopted. This is being organized by CiruitSuitra.
www.iscug.in/ISCUG-2012
After TLM 2.0 standardized and SystemC 2.3 this is the first meeting in Bangalore. So there will be definitely some talk around these new concepts.
If you have good experience you can submit a paper or presentation for the same. Feb 15 is the last date!
Hope to see you there in the event.
Poseidon
Tuesday, February 14, 2012
Wednesday, January 11, 2012
SystemC 2.3 and 1666-2011
The much awaited SystemC 2.3 is now available for Public review.
The updated specification of SystemC (1666-2011) is also made available. Similar to its predecessor, this is also downloadable free of cost from IEEE website.
The main changes from the 1666-2008 are the number of pages increased to 638! The list of changes is already mentioned in the specification (Annex D). So it won't be good if I copy them and paste here. Still some important ones are
Dynamic Process Capabilities
These will help us to control a SC_THREAD easily.
With v2.2, all threads need to handle the reset, wait in an explicit manner. Now with added functions, a Thread can be reset in a clean way.
Event Naming
A name can be assigned to an event. This will help us in debugging to find out.
+ A number of other additions/changes to SystemC functions and classes
- sc_start(), sc_pause()
- sc_get_status()
- sc_pending_activity(), sc_time_to_pending_activity()
- sc_vector<>, sc_assemble_vector()
- set_verbosity_level(), SC_REPORT_INFO_VERB()
- sc_event_and_list, sc_event_or_list
- sc_prim_channel::async_request_update()
TLM 2.0
Now TLM 2.0 is made a standard of SystemC. Already most tools are supporting TLM 2.0. All semiconductor companies which were following their own standards are in the process of migrating to these new standards.
As I get to practice these new features, I will try to post the usecases for the important ones.
The updated specification of SystemC (1666-2011) is also made available. Similar to its predecessor, this is also downloadable free of cost from IEEE website.
The main changes from the 1666-2008 are the number of pages increased to 638! The list of changes is already mentioned in the specification (Annex D). So it won't be good if I copy them and paste here. Still some important ones are
Dynamic Process Capabilities
These will help us to control a SC_THREAD easily.
With v2.2, all threads need to handle the reset, wait in an explicit manner. Now with added functions, a Thread can be reset in a clean way.
Event Naming
A name can be assigned to an event. This will help us in debugging to find out.
+ A number of other additions/changes to SystemC functions and classes
- sc_start(), sc_pause()
- sc_get_status()
- sc_pending_activity(), sc_time_to_pending_activity()
- sc_vector<>, sc_assemble_vector()
- set_verbosity_level(), SC_REPORT_INFO_VERB()
- sc_event_and_list, sc_event_or_list
- sc_prim_channel::async_request_update()
TLM 2.0
Now TLM 2.0 is made a standard of SystemC. Already most tools are supporting TLM 2.0. All semiconductor companies which were following their own standards are in the process of migrating to these new standards.
As I get to practice these new features, I will try to post the usecases for the important ones.
Tuesday, November 1, 2011
ARM unveils 64-bit architecture suited to servers
Oct 27th 2011:
A step by ARM towards its competition with Intel.
(Reuters) - British chip designer ARM has unveiled details of its first 64-bit architecture, which it said would expand its reach into enterprise applications such as servers currently dominated by Intel.
More: http://www.reuters.com/article/2011/10/27/us-arm-idUSTRE79Q5RR20111027
A step by ARM towards its competition with Intel.
(Reuters) - British chip designer ARM has unveiled details of its first 64-bit architecture, which it said would expand its reach into enterprise applications such as servers currently dominated by Intel.
More: http://www.reuters.com/article/2011/10/27/us-arm-idUSTRE79Q5RR20111027
Monday, October 31, 2011
Carbon SoC Designer and Model Studio
As expected more SoC tools are coming out with more options. SystemC and IP-XACT became norm of all tools
Carbon is a leading supplier of system-level tools to automatically create, validate, and deploy software models generated from Verilog and/or VHDL. Carbon models of ARM IP are industry's only 100% accurate models for use in system level modeling environments.
Carbon has officially released Carbon SoC Designer Plus 7.8 and Carbon Model Studio 5.9
Check out more in http://www.carbondesignsystems.com/CarbonModelStudio.aspx
http://www.carbondesignsystems.com/SocDesignerPlus.aspx
In near future, the tools will have common features and soon they will be inter-operable.
Carbon is a leading supplier of system-level tools to automatically create, validate, and deploy software models generated from Verilog and/or VHDL. Carbon models of ARM IP are industry's only 100% accurate models for use in system level modeling environments.
Carbon has officially released Carbon SoC Designer Plus 7.8 and Carbon Model Studio 5.9
Check out more in http://www.carbondesignsystems.com/CarbonModelStudio.aspx
http://www.carbondesignsystems.com/SocDesignerPlus.aspx
In near future, the tools will have common features and soon they will be inter-operable.
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